- VLSI (FPGA) DSP architecture (full array, time mux, bit serial) - 05_Control (Xilinx material) - System Generator for FPGA based synthesis (Simulink system generator for video applications) Reading: FPGA friendly digital filtering, retiming (Xilin

Submitted by admin on Thu, 01/18/2018 - 16:26
c_cosidx: 
132
c_moddate: 
2008-11-10 23:44:11
c_orderno: 
6
c_weekno: 
6
course: 
STopics in Communications(FPGA based Communication System Design)
topics_long: 
- VLSI (FPGA) DSP architecture (full array, time mux, bit serial) - 05_Control (Xilinx material) - System Generator for FPGA based synthesis (Simulink system generator for video applications) Reading: FPGA friendly digital filtering, retiming (Xilinx DSP Primer)